• DocumentCode
    1525455
  • Title

    Evaluating the use of register queues in software pipelined loops

  • Author

    Tyson, Gary S. ; Smelyanskiy, Mikhail ; Davidson, Edward S.

  • Author_Institution
    University of Michigan
  • Volume
    50
  • Issue
    8
  • fYear
    2001
  • fDate
    8/1/2001 12:00:00 AM
  • Firstpage
    769
  • Lastpage
    783
  • Keywords
    Computer architecture; Degradation; Delay; Hardware; Kernel; Optimizing compilers; Pipeline processing; Registers; Throughput; VLIW;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2001.947006
  • Filename
    947006