DocumentCode
1525497
Title
On table bandwidth and its update delay for value prediction on wide-issue ILP processors
Author
Lee, Sang-Jeong ; Yew, Pen-Chung
Author_Institution
Div. of Inf. Technol. Eng., Soonchunhyang Univ., Chungman, South Korea
Volume
50
Issue
8
fYear
2001
fDate
8/1/2001 12:00:00 AM
Firstpage
847
Lastpage
852
Abstract
We study two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value prediction tables needed in each machine cycle and the other is the delay required to update state values in the value prediction tables. We introduce a prediction value cache (PVC) which augments the instruction cache to hold the prediction values to handle these issues
Keywords
parallel architectures; performance evaluation; instruction cache; machine cycle; performance; prediction value cache; table bandwidth; update delay; value prediction; value prediction tables; wide-issue ILP processors; Bandwidth; Clocks; Delay; Hardware; Performance gain; Pipelines; Prediction algorithms; Predictive models;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.947012
Filename
947012
Link To Document