DocumentCode
1525866
Title
Analytical Model of Short-Channel Double-Gate JFETs
Author
Chang, Jiwon ; Kapoor, Ashok K. ; Register, Leonard F. ; Banerjee, Sanjay K.
Author_Institution
Univ. of Texas at Austin, Austin, TX, USA
Volume
57
Issue
8
fYear
2010
Firstpage
1846
Lastpage
1855
Abstract
In this paper, we propose a compact model of the short-channel double-gate (DG) JFETs, which are devices intended for low-power logic applications. In order to make the current equation continuous through all operating conditions from the subthreshold to well above the threshold without nonphysical fitting parameters, mobile carriers in depletion regions are considered. For describing the short-channel behavior, relevant parameters extracted from the 2-D analytical solution of Poisson´s equation are used to modify long-channel equations. The field-dependent mobility, velocity saturation, channel-length modulation, and drain-induced barrier lowering are considered in the short-channel analysis. Models for the DG JFET are verified through numerically simulated current-voltage characteristics. Based on the model of the DG JFETs, the advantages of the DG JFETs over single-gate MOSFETs-which may have similar fabrication requirements-with the subthreshold regime are addressed.
Keywords
MOSFET; junction gate field effect transistors; logic devices; low-power electronics; modulation; analytical model; channel-length modulation; drain-induced barrier; field-dependent mobility; low-power logic applications; mobile carriers; nonphysical fitting parameters; short-channel double-gate JFET; single-gate MOSFET; velocity saturation; Analytical models; Doping profiles; FETs; Fabrication; Fitting; JFETs; Logic devices; MOSFETs; Numerical simulation; Poisson equations; Junction field-effect transistor (JFET); low power; modeling; subthreshold swing;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2010.2051193
Filename
5497123
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