DocumentCode
1525990
Title
A scan-based configurable, programmable, and scalable architecture for sliding window-based operations
Author
Thibeault, Claude ; Begin, Guy
Author_Institution
Dept. of Electr. Eng., Ecole de Technol. Superieure, Montreal, Que., Canada
Volume
48
Issue
6
fYear
1999
fDate
6/1/1999 12:00:00 AM
Firstpage
615
Lastpage
627
Abstract
In this paper, a scan-based programmable, configurable, and scalable architecture is proposed. This architecture is suitable for a wide range of applications in signal processing requiring programmability and presenting high bandwidth and real-time requirements beyond the capacity of off-the-shelf DSPs or FGPAs. The architecture is specifically targeting a very common type of signal processing operation: sliding window operations (SWOs). Through various examples, the “programmability, configurability, and scalability” of the proposed architecture are illustrated. Our approach is then compared to traditional programmable architectures with coefficient registers in terms of gate count, speed (delay), and other implementation-related issues. This comparison reveals that our architecture leads to less complex solutions with comparable performance. In general, this approach can be seen as an alternative offering reduced recurrent costs at the expense of potentially higher nonrecurrent costs, which makes it very attractive for high volume production
Keywords
digital signal processing chips; field programmable gate arrays; reconfigurable architectures; DSPs; FGPAs; gate count; programmability; real-time requirements; scalable architecture; scan-based configurable architecture; signal processing; sliding window-based operations; Bandwidth; Circuits; Clocks; Costs; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Hardware; Logic; Signal processing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.773798
Filename
773798
Link To Document