Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors

Author

Liu, Shen-Iuan ; Lee, Jiin-Long ; Chang, Cheng-Chieh

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

46

Issue

7

fYear

1999

fDate

7/1/1999 12:00:00 AM

Firstpage

861

Lastpage

864

Abstract

A low-voltage BiCMOS four-quadrant multiplier using triode-region transistors is presented, this circuit has been fabricated in a 1.0 μm BiCMOS process. Experimental results show that for a power supply of ±1.5 V, the linear range is over ±0.6 V with the linearity error of less than 2%. The total harmonic distortion is less than 2% with an input range up to ±0.6 V. The measured -3-dB bandwidth of this proposed BiCMOS multiplier is about 10 MHz. This circuit is expected to be useful in low-voltage analog signal-processing applications

Keywords

BiCMOS analogue integrated circuits; analogue multipliers; low-power electronics; -1.5 V; 1 micron; 1.5 V; 10 MHz; BiCMOS multiplier; LV analog signal-processing applications; LV four-quadrant multiplier; low-voltage multiplier; total harmonic distortion; triode-region transistors; Bandwidth; BiCMOS integrated circuits; CMOS technology; Distortion measurement; Linearity; Low voltage; MOSFETs; Power supplies; Total harmonic distortion; Very large scale integration;

fLanguage

English

Journal_Title

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Publisher

ieee

ISSN

1057-7122

Type

jour

DOI

10.1109/81.774234

Filename

774234