• DocumentCode
    1527763
  • Title

    A Low-Power Capacitive Transducer for Portable Electrical Capacitance Tomography With High Dynamic Range

  • Author

    Cui, Jie ; Chan, P.K.

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    11
  • Issue
    12
  • fYear
    2011
  • Firstpage
    3388
  • Lastpage
    3399
  • Abstract
    This paper presents a new low-power high-resolution capacitive transducer for portable electrical capacitance tomography (ECT) applications. The mixed-signal transducer chip adopts a new switched-capacitor (SC) capacitance-to-voltage (CV) converter with stray immunity. The converter utilizes correlated double sampling (CDS) to minimize the 1/f noise and cancel the dc offset. Moreover, a new instrumentation-based methodology is realized through additional auto-zero (AZ) operations and two simple embedded sample-and-hold (S/H) circuitries to sample and cancel the front-end circuit level switch errors. With a high-resolution design objective, the design-for-test methodologies are also proposed, including the parasitic balancing technique and the charge lever mechanism. The simulation and measurement results validate the proposed methodologies and new circuit. The experimental results show that the transducer chip is able to sense the range of capacitance from 0.26 fF to 2 pF at a heavy parasitic capacitance of 150 pF, leading to a dynamic range of 77.8 dB at a single 3 V, while consuming a total of 4.5 mW. Compared with the reported works by several derived figures-of-merit, the IC prototype offers significant technical merits in terms of monolithic integration, a reduced power supply, low-power consumption, high resolution, and a high dynamic range.
  • Keywords
    capacitive sensors; correlation methods; design for testability; low-power electronics; sample and hold circuits; switched capacitor networks; tomography; capacitance 0.26 fF to 2 pF; capacitance 150 pF; charge lever mechanism; correlated double sampling; design-for-test methodologies; embedded sample-and-hold; high dynamic range; high resolution; low-power capacitive transducer; low-power consumption; mixed-signal transducer chip; monolithic integration; parasitic balancing technique; portable electrical capacitance tomography; reduced power supply; stray immunity; switched-capacitor capacitance-to-voltage converter; voltage 3 V; Capacitance measurement; Capacitors; Switching circuits; Tomography; Transducers; Capacitance-to-voltage (CV) converter; capacitive transducer; chopper-stabilized differential difference amplifier; design-for-test; electrical capacitance tomography (ECT); instrumentation; sample-and-hold (S/H) circuit; switched-capacitor (SC) circuit;
  • fLanguage
    English
  • Journal_Title
    Sensors Journal, IEEE
  • Publisher
    ieee
  • ISSN
    1530-437X
  • Type

    jour

  • DOI
    10.1109/JSEN.2011.2157125
  • Filename
    5776642