DocumentCode :
1528215
Title :
Simulation-Based Verification of Floating-Point Division
Author :
Guralnik, Elena ; Aharoni, Merav ; Birnbaum, Ariel J. ; Koyfman, Anatoly
Author_Institution :
IBM Res. Haifa, Haifa Univ., Haifa, Israel
Volume :
60
Issue :
2
fYear :
2011
Firstpage :
176
Lastpage :
188
Abstract :
Floating-point division is known to exhibit an exceptionally wide array of corner cases, making its verification a difficult challenge. Despite the remarkable advances in formal methods, the intricacies of this operation and its implementation often render these inapplicable. Simulation-based methods remain the primary means for verification of division. FPgen is a test generation framework targeted at the floating point datapath. It has been successfully used in the simulation-based verification of a variety of hardware designs. FPgen comprises a comprehensive test plan and a powerful test generator. A proper response to the difficulties posed by division constitutes a major part of FPgen´s capabilities. We present an overview of the relevant verification tasks supplied with FPgen and the underlying algorithms used to target them.
Keywords :
automatic test pattern generation; floating point arithmetic; formal verification; FPgen; floating point division; formal method; render operation; simulation based verification; test generation framework; Circuit simulation; Digital arithmetic; Formal verification; Hardware; Investments; Logic circuits; Power generation; Space technology; State-space methods; Testing; Computer arithmetic; test generation.; verification;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2010.165
Filename :
5499463
Link To Document :
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