A Low Phase Noise, Wideband and Compact CMOS PLL for Use in a Heterodyne 802.15.3c Transceiver

Author

Murphy, David ; Gu, Qun Jane ; Wu, Yi-Cheng ; Jian, Heng-Yu ; Xu, Zhiwei ; Tang, Adrian ; Wang, Frank ; Chang, Mau-Chung Frank

Author_Institution

Electr. Eng. Dept., Univ. of California, Los Angeles, Los Angeles, CA, USA

Volume

46

Issue

7

fYear

2011

fDate

7/1/2011 12:00:00 AM

Firstpage

1606

Lastpage

1617

Abstract

A low phase noise, wideband, mm-wave, integer-N PLL that is capable of supporting an 802.15.3c heterodyne transceiver is reported. The PLL can generate 6 equally spaced tones from 43.2 GHz to 51.84 GHz, which is suitable for a heterodyne architecture with F_LO=(4/5)×F_TRX. Phase noise is measured directly at the F_LO frequency and is better than -97.5 dBc/Hz@1 MHz across the entire band. The reported frequency synthesizer is smaller, exhibits less phase noise, and consumes less power than prior art. In addition, the F_LO tone corresponds to the fundamental of the VCO as opposed to a higher harmonic.

Keywords

CMOS analogue integrated circuits; field effect MIMIC; frequency synthesizers; millimetre wave oscillators; personal area networks; phase locked loops; phase noise; radio transceivers; voltage-controlled oscillators; VCO; compact CMOS PLL; fine discrete tuning; frequency 43.2 GHz to 51.84 GHz; frequency synthesizer; frequency tuning element; heterodyne 802.15.3c transceiver; integer-N PLL; low phase noise; mm-wave PLL; programmable transmission line; wideband CMOS PLL; CMOS integrated circuits; Phase locked loops; Phase noise; Resonant frequency; Tuning; Voltage-controlled oscillators; 60 GHz; PLL; VCO; mm-wave; phase noise; wideband;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2011.2143950

Filename

5776718