DocumentCode
1528832
Title
An universal input and output RNS converter
Author
Meehan, S.J. ; O´Neil, S.D. ; Vaccaro, J.J.
Author_Institution
MITRE Corp., Bedford, MA, USA
Volume
37
Issue
6
fYear
1990
fDate
6/1/1990 12:00:00 AM
Firstpage
799
Lastpage
803
Abstract
A systolic architecture is presented which is capable of both input and output conversion with a throughput equal to that of the fast residue number system (RNS) processes of addition and multiplication. The converter can be used with an arbitrary RNS (within certain realization-imposed limits). An actual anticipated VLSI layout is described that will be programmable for RNSs with up to eight moduli of six bits or less. This should provide an off-the-shelf solution for many RNS conversion requirements
Keywords
VLSI; adders; cellular arrays; digital arithmetic; digital signal processing chips; multiplying circuits; DSP chip; RNS converter; VLSI layout; addition; multiplication; residue number system; systolic architecture; Algorithm design and analysis; Circuits and systems; Hardware; Limiting; Signal processing; Signal processing algorithms; Throughput; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/31.55037
Filename
55037
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