A user´s view of the new MIL-STD-883 procedure 5012

Author

Pyron, Carol ; Vining, Suzanne

Author_Institution

Texas Instrum. Inc., Plano, TX, USA

Volume

6

Issue

1

fYear

1991

Firstpage

6

Lastpage

12

Abstract

The MIL-STD-883 Procedure 5012, Fault Coverage Measurement for Digital Microcircuits, is reviewed. Procedure 5012 specifies a standard fault set and fault coverage calculation techniques. The motivation and benefits of the standard are detailed. The effect of the standard fault set is studied by analysis and presentation of test case data. An actual example illustrates the costs of generating a compliant fault coverage report. US Department of Defense contractors, fault simulation developers, and semiconductor vendors are encouraged to create the necessary supporting infrastructure for the new standard.<>

Keywords

automatic testing; digital integrated circuits; fault location; integrated circuit testing; logic testing; military equipment; military systems; ASIC; IC; MIL-STD-883 procedure 5012; US Department of Defense; costs; digital microcircuits; fault coverage report; fault simulation; microelectronics; military standards; Application specific integrated circuits; Circuit faults; Costs; Instruments; Logic devices; Logic gates; Logic testing; Procurement; Read-write memory; Standards development;

fLanguage

English

Journal_Title

Aerospace and Electronic Systems Magazine, IEEE

Publisher

ieee

ISSN

0885-8985

Type

jour

DOI

10.1109/62.64987

Filename

64987