An overview of manufacturing yield and reliability modeling for semiconductor products

Author

Kuo, Way ; Kim, Taeho

Author_Institution

Zachry Eng. Center, Texas A&M Univ., College Station, TX, USA

Volume

87

Issue

8

fYear

1999

fDate

8/1/1999 12:00:00 AM

Firstpage

1329

Lastpage

1344

Abstract

This paper presents an overview of yield, reliability, burn-in, cost factors, and fault coverage as practiced in the semiconductor manufacturing industry. Reliability and yield modeling can be used as a foundation for developing effective stress burn-in, which in turn can warranty high-quality semiconductor products. Yield models are described and their advantages and disadvantages are discussed. Both yield reliability relationships and relation models between yield and reliability are thoroughly analyzed in regard to their importance to semiconductor products

Keywords

integrated circuit economics; integrated circuit modelling; integrated circuit reliability; integrated circuit yield; burn-in; cost factors; fault coverage; high-quality semiconductor products; manufacturing yield; reliability modeling; semiconductor manufacturing industry; semiconductor products; stress burn-in; Aging; CMOS integrated circuits; Integrated circuit yield; Large scale integration; Manufacturing industries; Monolithic integrated circuits; Semiconductor device manufacture; Semiconductor device modeling; Semiconductor device reliability; Virtual manufacturing;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/5.775417

Filename

775417