DocumentCode :
1531781
Title :
Timing analysis of asynchronous systems using time separation of events
Author :
Chakraborty, Supratik ; Yun, Y. ; Dill, David L.
Author_Institution :
Fujitsu Labs. of America, Sunnyvale, CA, USA
Volume :
18
Issue :
8
fYear :
1999
fDate :
8/1/1999 12:00:00 AM
Firstpage :
1061
Lastpage :
1076
Abstract :
This paper describes a pseudo-polynomial time algorithm for timing analysis of a class of choice-free asynchronous systems, called tightly coupled systems, with both min- and max-type timing constraints and bounded component delays. The algorithm consists of two phases: (1) long-term behavior analysis, that computes bounds on the time separation of events after the system has run for a sufficiently long period of time, and (2) startup behavior analysis, that computes time separations between events during an initial startup period after the system is powered up. The results of the analysis are conservative in the worst case; nevertheless, they are found to be exact in our experiments. To demonstrate the practical utility of the approach, an asynchronous differential equation solver chip has been modeled and analyzed using the proposed algorithm. We report results of datapath timing verification, intercontroller protocol timing verification and performance analysis of the chip using the proposed technique
Keywords :
asynchronous circuits; difference equations; timing; asynchronous circuit; datapath timing; differential equation solver chip; event time separation; intercontroller protocol timing; pseudo-polynomial time algorithm; tightly coupled system; timing analysis; Algorithm design and analysis; Computer aided analysis; Control systems; Delay effects; Differential equations; Logic circuits; Performance analysis; Power system modeling; Protocols; Timing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.775628
Filename :
775628
Link To Document :
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