A new self-aligned offset staggered polysilicon thin-film transistor

Author

Han, Jung-In ; Yang, Gi-Young ; Han, Chul-Hi

Author_Institution

Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea

Volume

20

Issue

8

fYear

1999

Firstpage

381

Lastpage

383

Abstract

A new self-aligned offset staggered polysilicon thin-film transistor (poly-Si TFT) has been proposed and demonstrated to have a suppressed leakage current. For the self-aligned offset structure, planarization with thick photoresist and etchback of photoresist are successfully utilized. The offset length can be easily controlled by the thickness of the gate material without photolithographic limitation. In the self-aligned offset polysilicon TFT´s, the leakage current decreases with an increasing offset length.

Keywords

elemental semiconductors; leakage currents; photoresists; semiconductor device measurement; silicon; sputter etching; thin film transistors; I-V characteristics; RIE; Si-SiO/sub 2/; offset length control; photoresist etchback; planarization; polysilicon thin-film transistor; self-aligned offset staggered polysilicon TFT; suppressed leakage current; thick photoresist; Active matrix liquid crystal displays; Etching; Fabrication; Leakage current; Planarization; Plasma applications; Plasma sources; Resists; Thickness control; Thin film transistors;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.778147

Filename

778147