Title :
Optimization of via formation in photosensitive dielectric layers using neural networks and genetic algorithms
Author :
Kim, Tae Seon ; May, Gary S.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fDate :
4/1/1999 12:00:00 AM
Abstract :
Via formation using photosensitive polymer technology can reduce process cost by reducing process complexity and is hence of great interest in electronics packaging substrate fabrication. However, to overcome technical difficulties and to facilitate low-cost manufacturing, process modeling, optimization and control are required. In this paper, a process optimization approach for via formation in dielectric layers composed of photosensitive benzocyclobutene (BCB) for high density interconnect (HDI) in MCM-L/D substrates is presented. A series of designed experiments are used to characterize the via formation workcell (which consists of the spin coat, soft bake, expose, develop, cure, and plasma de-scum unit process steps). Neural network process models are then constructed to characterize via yield and geometry, as well as film thickness, retention, and uniformity. These models are used for process optimization using genetic algorithms (GA´s) and hybrid combinations of GA´s with the Powell algorithm and with the simplex algorithm. The optimized process recipes are verified experimentally. Comparison of the three approaches reveals that the hybrid GA/simplex method yields superior recipes
Keywords :
design of experiments; genetic algorithms; integrated circuit interconnections; integrated circuit packaging; multichip modules; neural nets; optical polymers; MCM-L/D substrates; Powell algorithm; benzocyclobutene; cure; electronics packaging substrate fabrication; expose; film thickness; genetic algorithms; high density interconnect; low-cost manufacturing; neural networks; optimization; photosensitive dielectric layers; plasma de-scum; process complexity; process cost; process modeling; process optimization; retention; simplex algorithm; soft bake; spin coat; via formation; via yield; Costs; Dielectric substrates; Electronics packaging; Fabrication; Manufacturing processes; Neural networks; Plasma applications; Plasma density; Polymers; Virtual manufacturing;
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
DOI :
10.1109/6104.778172