Unified Scale Length for Four-Terminal Double-Gate MOSFETs

Author

Xingye Zhou ; Feng Liu ; Lining Zhang ; Cheng Wang ; Jin He ; Xing Zhang ; Mansun Chan

Author_Institution

Sch. of Electron. Eng. & Comput. Sci., Peking Univ., Beijing, China

Volume

59

Issue

7

fYear

2012

fDate

7/1/2012 12:00:00 AM

Firstpage

1997

Lastpage

1999

Abstract

A unified scale length formula for four-terminal double-gate (DG) MOSFETs is proposed in this paper to provide a guideline for device design to obtain a practical threshold voltage and a subthreshold swing. By investigating the boundary conditions for Laplace´s equation in the channel of DG MOSFETs, the evanescent-mode analysis method is extended to form a unified scaling scheme. The unified model is proved to be applicable to two common device structures: ultrathin-body silicon-on-insulator and symmetric DG MOSFETs based on 2-D technology computer-aided design simulation. With this model, the relationship among different well-known scaling rules can be well explained and understood.

Keywords

Laplace equations; MOSFET; silicon-on-insulator; 2D technology computer-aided design simulation; Laplace equation; boundary condition; device design; evanescent-mode analysis method; four-terminal double-gate MOSFET; subthreshold swing; symmetric DG MOSFET; threshold voltage; ultrathin-body silicon-on-insulator; unified scale length; Computational modeling; Educational institutions; Logic gates; MOSFETs; Mathematical model; Silicon; Device design; double-gate (DG) metal–oxide–semiconductor field-effect transistor (MOSFET); scale length; short-channel effects (SCEs);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2012.2196520

Filename

6213539