• DocumentCode
    1534879
  • Title

    Improved net merging method for gate matrix layout

  • Author

    Shu, W. ; Wu, M.-Y. ; Kang, S.M.

  • Author_Institution
    Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
  • Volume
    7
  • Issue
    9
  • fYear
    1988
  • fDate
    9/1/1988 12:00:00 AM
  • Firstpage
    947
  • Lastpage
    951
  • Abstract
    A net-merging method is proposed for gate-matrix layout. The method is based on a density function to calculate the minimum number of tracks necessary for the net assignment. Examples that demonstrate how this method leads to a denser gate matrix layout are included. The pitch of the gate columns is determined by the design rules, in particular, the space required to accommodate a diffused region with an internal contact window between two poly columns. In gate matrix layout, when the space between a pair of gate columns is not sufficient, the spacing between them can be increased locally to two pitches to avoid design rule violation as long as such a local change does not cause column matching problems
  • Keywords
    MOS integrated circuits; circuit layout CAD; integrated circuit technology; network topology; CAD; MOSFET; MOSIC; computer aided design; density function; design rules; diffused region; gate column pitch; gate matrix layout; internal contact window; net assignment; net merging method; Contacts; Density functional theory; Density measurement; FETs; Helium; Heuristic algorithms; MOSFET circuits; Measurement units; Merging; Tail;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.7793
  • Filename
    7793