Author :
Gai, Silvano ; Montessoro, Pier Luca ; Somenzi, Fabio
Abstract :
MOZART, a concurrent fault simulator for large circuits described at the register-transfer, functional, gate, and switch levels, is described. The requirements of multilevel simulation have guided the definition of MOZART´s syntax, value set, delay model, and algorithms. Performance is improved by reducing unnecessary activity. Two such techniques are levelized: two-pass simulation, which minimizes the number of events and evaluations, and list event scheduling, which allows optimized processing of simultaneous (fraternal) events for concurrent machines. Moreover, efficient handling of abnormally large or active fault machines can improve fault-simulator performance by several orders of magnitude. These and related issues are discussed; both analytical and experimental evidence is provided for the effectiveness of the solutions adopted in MOZART. A performance metric is introduced for fault simulation, based on comparison with the serial algorithm, and is more accurate than those used in the past
Keywords :
circuit analysis computing; digital integrated circuits; integrated logic circuits; logic CAD; MOZART; active fault machines; circuit analysis computing; concurrent multilevel simulator; delay model; digital IC; fault simulator; functional level; gate level; large circuits; list event scheduling; logic circuit; performance metric; register-transfer level; serial algorithm; switch levels; syntax; two-pass simulation; value set; Circuit faults; Circuit simulation; Computational modeling; Delay; Discrete event simulation; Failure analysis; Fault detection; Logic design; Logic testing; Switches;
