Title :
The implementation of a reduced-field profile design for high-performance bipolar transistors
Author :
Lu, Pong-Fei ; Comfort, James H. ; Tang, Denny D. ; Meyerson, B.S. ; Sun, J.Y.-C.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The first realization of a reduced-field design concept for advanced bipolar devices using the low-temperature epitaxial (LTE) technique to form the base layer is described. By inserting a lightly doped collector (LDC) spacer layer between the heavily doped base and collector regions, it is successfully demonstrated that the collector-base (CB) junction avalanche multiplication can be reduced substantially while maintaining high collector doping for current density consideration. Similar applications of the LDS technique to the emitter-base (EB) junction also results in a lower electric field, thus less EB junction reverse leakage. The feasibility of the reduced-field profile design concept is demonstrated using a LTE-base device structure.<>
Keywords :
bipolar transistors; doping profiles; vapour phase epitaxial growth; EB junction reverse leakage; base layer; bipolar devices; collector-base junction avalanche multiplication; current density; electric field; heavily doped base region; heavily doped collector region; high collector doping; high-performance bipolar transistors; lightly doped collector spacer layer; low temperature epitaxial technique; reduced-field profile design; Bipolar transistors; Boron; Breakdown voltage; Current density; Doping; P-n junctions; PIN photodiodes; Tail; Temperature; Thickness measurement;
Journal_Title :
Electron Device Letters, IEEE
