DocumentCode
1535595
Title
Level-shifted 0.5-μm BiCMOS circuits
Author
Chen, Chih-Liang
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume
25
Issue
5
fYear
1990
fDate
10/1/1990 12:00:00 AM
Firstpage
1214
Lastpage
1216
Abstract
A circuit concept, level shifting, is presented for scaled BiCMOS circuits. A full-swing, ground-level-shifted (FS-GLS) BiCMOS circuit has shown approximately 1.6× speed improvement over a conventional partial-swing BiCMOS circuit, and a 4× better driving capability over a CMOS circuit at 3.3 V. With a high-performance p-n-p device, simulations show that the level-shifted complementary BiCMOS can provide further speed leverage over the BiCMOS circuit with n-p-n only
Keywords
BIMOS integrated circuits; digital integrated circuits; driver circuits; 0.5 micron; complementary bipolar transistor; digital circuits; driving capability; high-performance p-n-p device; level shifting; scaled BiCMOS circuits; BiCMOS integrated circuits; CMOS digital integrated circuits; Capacitance; Circuit noise; Circuit simulation; Digital circuits; Diodes; Noise reduction; Variable structure systems; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.62144
Filename
62144
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