• DocumentCode
    1535600
  • Title

    Characteristics of Fully Depleted Strained-Silicon-On-Insulator Capacitorless Dynamic Random Access Memory Cells

  • Author

    Kim, Min-Soo ; Cho, Won-Ju

  • Author_Institution
    Dept. of Electron. Mater. Eng., Kwangwoon Univ., Seoul, South Korea
  • Volume
    30
  • Issue
    12
  • fYear
    2009
  • Firstpage
    1356
  • Lastpage
    1358
  • Abstract
    A fully depleted strained-silicon-on-insulator (FD-sSOI) capacitorless one-transistor dynamic random access memory (IT-DRAM) cell with a strained channel was fabricated, and the electrical characteristics of transistor and DRAM were compared with that of a conventional FD-SOI capacitorless IT-DRAM cell. The fabricated FD-sSOI DRAM cell has excellent transistor electrical parameters, such as extremely low leakage current (< 10-12 A), small subthreshold swing of 60.3 mV/dec, and high on/off current ratio of nearly 108. Furthermore, the FD-sSOI 1T-DRAM cell shows enhanced effective electron mobility and improved sensing margin compared with the FD-SOI IT-DRAM cell.
  • Keywords
    DRAM chips; silicon-on-insulator; IT-DRAM cell; capacitorless one-transistor dynamic random access memory; fully depleted strained-silicon-on-insulator; sensing margin; Effective mobility; one-transistor dynamic random access memory (1T-DRAM); sensing margin; strained-silicon-on-insulator (sSOI);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2009.2033319
  • Filename
    5308313