• DocumentCode
    1536391
  • Title

    Automating the design of SOCs using cores

  • Author

    Bergamaschi, Reinaldo A. ; Bhattacharya, Subhrajit ; Wagner, Ronaldo ; Fellenz, Colleen ; Muhlada, Michael ; White, Foster ; Daveau, Jean-Marc ; Lee, William R.

  • Volume
    18
  • Issue
    5
  • fYear
    2001
  • Firstpage
    32
  • Lastpage
    45
  • Abstract
    Assembling a system on a chip using IP blocks is an error-prone, labor-intensive, and time-consuming process. Emerging high-level tools can help by automating many of the design tasks
  • Keywords
    electronic design automation; high level synthesis; microprocessor chips; IP blocks; SOCs; cores; high-level tools; Assembly systems; LAN interconnection; Libraries; Logic; Manufacturing; Microelectronics; Pins; Protocols; System testing; System-on-a-chip;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.953270
  • Filename
    953270
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1536391