Low-power and high-speed ROM modules for ASIC applications

Author

Chang, Ching-Rong ; Wang, Jinn-Shyan ; Yang, Cheng-Hui

Author_Institution

Dept. of Electr. Eng., Nat. Chung-Cheng Univ., Taiwan, China

Volume

36

Issue

10

fYear

2001

fDate

10/1/2001 12:00:00 AM

Firstpage

1516

Lastpage

1523

Abstract

We describe in this paper the design of a set of low-power and high-speed NOR-type ROM modules suitable for embedded applications in ASICs or SOCs. The circuit is derived from the four-phase high-speed precharge-discharge dynamic CMOS logic (NHS-PDCMOS) with the number of operational phases reduced from four to one. This facilitates the interconnections to other system blocks that are usually designed to be one phase. Experimental results show that for the size of 2K×8, the proposed high-speed ROM module is about 1.89 times faster, consumes 21% less power, and occupies similar silicon area as compared to a conventional design. Also for the same size, the proposed low-power ROM module is 1.17 times faster, 14% smaller, and consumes 83% less power as compared to the conventional design

Keywords

CMOS logic circuits; NOR circuits; application specific integrated circuits; high-speed integrated circuits; low-power electronics; read-only storage; ASIC; NHS-PDCMOS; NOR-type circuit; four-phase high-speed precharge-discharge dynamic CMOS logic circuit; high-speed ROM module; low-power ROM module; system-on-chip; Application specific integrated circuits; CMOS logic circuits; CMOS process; Decoding; Integrated circuit interconnections; Logic circuits; MOSFETs; Power system interconnection; Read only memory; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.953480

Filename

953480