DocumentCode :
1536872
Title :
A carry-free 54b×54b multiplier using equivalent bit conversion algorithm
Author :
Kim, Yun ; Song, Bang-Sup ; Grosspietsch, John ; Gillig, Steven F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
Volume :
36
Issue :
10
fYear :
2001
fDate :
10/1/2001 12:00:00 AM
Firstpage :
1538
Lastpage :
1545
Abstract :
An equivalent bit conversion algorithm (EBCA) is proposed to eliminate the need for final carry propagation in the redundant binary (RB) to normal binary (NB) conversion step for RB multiplication. The multiplication process helps with the carry-free conversion step by eliminating certain combinations of RB product. When the EBCA is applied, conventional power-consuming carry-propagating adders are replaced by simple, minimum-sized carry-free converters, and the entire multiplication process can be made free of carry propagation from input to output. The method employed in this work reduces 40% of the total power and 30% of the total multiplication time in the final adder stage of traditional multipliers. The prototype fabricated in 0.35-μm CMOS demonstrates that the 54 b×54 b multiplier consumes only 53.4 mW at 3.3 V for 74-MHz operation
Keywords :
CMOS logic circuits; multiplying circuits; redundant number systems; 0.35 micron; 3.3 V; 53.4 mW; 54 bit; 74 MHz; CMOS chip; carry-free multiplier; equivalent bit conversion algorithm; normal binary number; redundant binary number; Adders; Computer applications; Computer architecture; Digital signal processing; Encoding; Fabrication; Mobile computing; Niobium; Prototypes; Signal processing algorithms;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.953482
Filename :
953482
Link To Document :
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