• DocumentCode
    1537085
  • Title

    MOS implementation of winner-take-all network with application to content-addressable memory

  • Author

    Johnson, L.C. ; Jalaleddine, S.M.S.

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Oklahoma State Univ., Stillwater, OK, USA
  • Volume
    27
  • Issue
    11
  • fYear
    1991
  • fDate
    5/23/1991 12:00:00 AM
  • Firstpage
    957
  • Lastpage
    958
  • Abstract
    Implementation of a winner-take-all (WTA) network suitable for implementing a nearest-match content-addressable memory (CAM) is presented. The resolution of the network in differentiating between words with large bit mismatches is presented. A measure of the time performance of the network is also given. A fully functional 16 word by 12 bit chip has been fabricated through MOSIS using 2 mu m double-metal CMOS technology.
  • Keywords
    CMOS integrated circuits; content-addressable storage; integrated memory circuits; MOSIS; bit mismatches; content-addressable memory; double-metal CMOS technology; time performance; winner-take-all network;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910597
  • Filename
    78112
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1537085