DocumentCode :
1537620
Title :
A dynamically allocated CMOS dual-LIFO register stack
Author :
McDonnell, Mark ; Winters, Kel
Author_Institution :
Dept. of Electr. Eng., Montana State Univ., Bozeman, MT, USA
Volume :
25
Issue :
5
fYear :
1990
fDate :
10/1/1990 12:00:00 AM
Firstpage :
1287
Lastpage :
1290
Abstract :
The design of a single vertically shifting VLSI register module that functions as two dynamically partitioned last-in-first-out (LIFO) stacks is presented. The module consists of a tiled array of custom static master-slave storage elements with a simple state machine adjacent to each register word serving as a register allocation controller. The dual-stack module is intended primarily for application in stack-based processor architectures requiring two high-performance LIFO stacks. Simulation results are presented
Keywords :
CMOS integrated circuits; VLSI; computer architecture; flip-flops; logic arrays; CMOS; custom static master-slave storage elements; dual-LIFO register stack; dynamic allocation; dynamically partitioned; last-in-first-out; register allocation controller; stack-based processor architectures; state machine; tiled array; vertically shifting VLSI register module; Algorithms; Design methodology; Flip-flops; Hardware; Instruction sets; Linear discriminant analysis; Logic arrays; Master-slave; Registers; Very large scale integration;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.62153
Filename :
62153
Link To Document :
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