• DocumentCode
    1537679
  • Title

    ADirpNB: a cost-effective way to implement full map directory-based cache coherence protocols

  • Author

    Li, Tao ; John, Lizy Kurian

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
  • Volume
    50
  • Issue
    9
  • fYear
    2001
  • fDate
    9/1/2001 12:00:00 AM
  • Firstpage
    921
  • Lastpage
    934
  • Abstract
    Directories have been used to maintain cache coherency in shared memory multiprocessors with private caches. The traditional full map directory tracks the exact caching status for each shared memory block and is designed to be efficient and simple. Unfortunately, the inherent directory size explosion makes it unsuitable for large-scale multiprocessors. In this paper, we propose a new directory scheme, dubbed associative full map directory (ADirpNB) which reduces the directory storage requirement. The proposed ADirpNB uses one directory entry to maintain the sharing information for a set of exclusively cached memory blocks in a centralized linked list style. By implementing dynamic cache pointer allocation, reclamation, and replacement hints, ADirpNB can be implemented as “a full map directory with lower directory memory cost”. Our analysis indicates that, on a typical architectural paradigm, ADirpNB reduces memory overhead of a traditional full map directory by up to 70-80 percent. In addition to the low memory overhead, we show that the proposed scheme can be implemented with appropriate protocol modification and hardware addition. Simulation studies indicate that ADirpNB can achieve a competitive performance with the Dir pNB. Compared with limited directory schemes, ADirpNB shows more stable and robust performance results on applications across a spectrum of memory sharing and access patterns due to the elimination of directory overflows. We believe that ADirp NB can be employed as a design alternative of full map directory for moderately large-scale and fine-grain shared memory multiprocessors
  • Keywords
    cache storage; content-addressable storage; memory protocols; shared memory systems; associative full map directory; cache coherence protocols; directory scheme; map directory-based; shared memory multiprocessors; Access protocols; Application software; Coherence; Computer architecture; Delay; Explosions; Hardware; Large-scale systems; Niobium; Robustness;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.954507
  • Filename
    954507