Title :
A 2.125-Gb/s BiCMOS fiber channel transmitter for serial data communications
Author :
Fukaishi, Muneo ; Nakamura, Satoshi ; Tajima, Akio ; Kinoshita, Yasushi ; Suemura, Yoshihiko ; Suzuki, Hisamitsu ; Itani, Toshiro ; Miyamoto, Hidenobu ; Henmi, Naoya ; Yamazaki, Tohru ; Yotsuyanagi, Michio
Author_Institution :
Silicon Syst. Res. Labs., NEC Corp., Sagamihara, Japan
fDate :
9/1/1999 12:00:00 AM
Abstract :
A 2.125-Gb/s transmitter meeting the specifications of the emerging ANSI Fiber Channel standard has been developed using BiCMOS technology. This transmitter features (1) a fully bipolar 10:1 multiplexer (MUX) and a 2.125-GHz retimer for high-accuracy transmission of data, (2) an emitter-coupled logic (ECL) CMOS analog phase-locked loop, (3) pure ECL-level output for direct connection to the currently available optical modules, and (4) BiCMOS process technology that includes 0.25-μm CMOS devices and 20-GHz bipolar devices. The LSI serializes 32-bit-wide, 53.125-Mb/s data into 2.125-Gb/s data through a CMOS 8B10B encoder. The chip area is 3×2 mm2, and the power dissipation is 860 mW
Keywords :
BiCMOS integrated circuits; data communication equipment; digital communication; emitter-coupled logic; high-speed integrated circuits; large scale integration; mixed analogue-digital integrated circuits; optical transmitters; phase locked loops; timing circuits; 0.25 micron; 2.125 Gbit/s; 20 GHz; 53.125 Mbit/s; 860 mW; ANSI Fiber Channel standard; BiCMOS fiber channel transmitter; CMOS 8B10B encoder; CMOS analog PLL; ECL; LSI; analog phase-locked loop; emitter-coupled logic; fully bipolar multiplexer; retimer; serial data communications; ANSI standards; BiCMOS integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Logic devices; Multiplexing; Optical transmitters; Phase locked loops; Standards development;
Journal_Title :
Solid-State Circuits, IEEE Journal of
