DocumentCode :
1537799
Title :
Effects of substrate resistances on LNA performance and a bondpad structure for reducing the effects in a silicon bipolar technology
Author :
Colvin, John T. ; Bhatia, Saket S. ; O, K.K.
Author_Institution :
Adv.-Mixed Signal Design Center, Cadence Design Syst. Inc., San Jose, CA, USA
Volume :
34
Issue :
9
fYear :
1999
fDate :
9/1/1999 12:00:00 AM
Firstpage :
1339
Lastpage :
1344
Abstract :
The effects of substrate resistances on the performance of 5.8-GHz low-noise amplifiers (LNAs) have been evaluated through a combination of experimental and simulation studies. The substrate resistive network for the LNA has been constructed by fabricating and measuring a test structure. The substrate resistances can be significantly affected by the die area and thickness, which raises a serious concern for on-wafer testing and optimization of circuits using the test results. The substrate resistances reduce the simulated gain by more than 10 dB and increase the noise figure by 2.7 dB. The simulation study has shown that the dominant substrate resistances are those associated with the bondpads. To reduce the effects of the substrate resistances, a ground-shielded bondpad structure, which consists of a Metal 2 pad and an n+ plug grounded shield separated by a composite oxide layer, has been developed. It reduces the resistance to ground to almost zero by conducting the signal away from the substrate to ground through the low-resistivity n+ plug layer. The pad structure in addition improves the interpad isolation by as much as 35 dB. However, to harness this isolation improvement, the inductance between the IC and PC board ground should be made small by using a low ground inductance package. Using this ground-shielded bondpad, the measured gain and noise figure of a 4.5-GHz tuned amplifier were improved by 10 and 2 dB, respectively, over the same circuit implemented using the conventional bondpad
Keywords :
MMIC amplifiers; bipolar MMIC; electric resistance; integrated circuit bonding; integrated circuit measurement; integrated circuit noise; integrated circuit packaging; isolation technology; silicon; substrates; 4.5 GHz; 5.8 GHz; LNA performance; Si; Si bipolar technology; composite oxide layer; die area; die thickness; ground-shielded bondpad structure; interpad isolation improvement; low ground inductance package; low-noise amplifiers; n+ plug grounded shield; onwafer testing; substrate resistances; substrate resistive network; tuned amplifier; Bonding; Circuit simulation; Circuit testing; Electrical resistance measurement; Gain measurement; Inductance; Integrated circuit packaging; Low-noise amplifiers; Noise figure; Plugs;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.782095
Filename :
782095
Link To Document :
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