Title :
CMOS switched-current ladder filters
Author :
Fiez, Terri S. ; Allstot, David J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Washington State Univ., Pullman, WA, USA
fDate :
12/1/1990 12:00:00 AM
Abstract :
The design and implementation of switched-current (SI) ladder filters is described. The basic current-mode circuits, including the SI differential integrator/summer are developed. The SI integrator/summer is shown to be directly analogous to the switched-capacitor (SC) integrator/summer; thus, all the synthesis techniques developed for the design of SC filters can be used to synthesize SI filters. Signal flowgraph synthesis of SI ladder filters is presented. The nonideal characteristics of SI ladder filters that limit their accuracy are evaluated. Clock-feedthrough and device mismatch induced errors are more severe in the present SI circuit configurations than in SC circuits. A standard digital 2-μm n-well CMOS process has been used to implement two high-order ladder filters. Simulations accurately predict the measured results of the first integrated SI filters. The area and power dissipation are comparable to those obtained with the switched-capacitor technique
Keywords :
CMOS integrated circuits; active filters; integrating circuits; ladder networks; summing circuits; switched filters; 2 micron; SI differential integrator/summer; SI filters; clock-feedthrough filters; current-mode circuits; device mismatch induced errors; high-order ladder filters; n-well CMOS process; power dissipation; switched-current ladder filters; synthesis techniques; Adders; CMOS process; Circuit simulation; Circuit synthesis; Clocks; Current mode circuits; Digital filters; Integrated circuit measurements; Predictive models; Signal synthesis;
Journal_Title :
Solid-State Circuits, IEEE Journal of
