DocumentCode
1538327
Title
Matrix and vector multiplications using a 21/2-dimensional systolic array
Author
Lam, S.P.S.
Author_Institution
East Anglia Univ., Norwich, UK
Volume
26
Issue
18
fYear
1990
Firstpage
1453
Lastpage
1454
Abstract
A pseudo-three-dimensional network, called a 21/2-dimensional systolic array, to compute matrix-vector and matrix-matrix multiplications is introduced. The new architecture achieves twice the throughput rate as that of the conventional systolic arrays with the same number of processing elements. This new approach provides a practical means for the implementation using current integration technology.
Keywords
VLSI; cellular arrays; matrix algebra; parallel algorithms; parallel architectures; 2 1/ 2-dimensional systolic array; VLSI; computer architecture; digital arithmetic; image processing; matrix vector multiplication; matrix-matrix multiplications; pseudo-three-dimensional network;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19900932
Filename
58086
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