CMOS device with self-aligned source/drain using amorphous silicon local interconnection layer

A novel CMOS device, which has a self-aligned source/drain structure using an amorphous silicon local interconnection (ASLI) layer is demonstrated. The proposed device not only has very small areas of source/drain junctions, but also has shallow junction depths much shallower than conventional structures. The capacitance reduction of the source/drain junctions significantly enhances the operating speed