A 250-Mb/s 32×32 CMOS crosspoint LSI for ATM switching systems

Author

Akata, Masao ; Karube, Shun-ichi ; Sakamoto, Takashi ; Saito, Tadashi ; Yoshida, Shinji ; Maeda, Toshio

Author_Institution

NEC Corp., Chiba, Japan

Volume

25

Issue

6

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1433

Lastpage

1439

Abstract

A 32×32 crosspoint LSI and a time-slot controlled asynchronous-transfer-mode (ATM) switch architecture utilizing the LSI are presented. The ATM switch, which is classified as an input-buffer-type ATM switch, enables 99% throughput and broadcasting capability. The crosspoint LSI is characterized by the bit-map oriented and pipelined connection control method which can switch and broadcast 160-Mb/s ATM cells, 32×32 switch cells which have less parasitic capacitance, and emitter-coupled-logic (ECL) compatible interfaces which are compatible with a 160-MHz broadband ISDN data rate. The LSI has been fabricated by a 1-μm CMOS process. The chip size is 7.4 mm×7.4 mm. According to the evaluation, operation at 250 Mb/s is confirmed. 1.2-W power consumption is observed at 160-Mb/s operating condition

Keywords

CMOS integrated circuits; ISDN; large scale integration; packet switching; pipeline processing; 1 micron; 1.2 W; 250 Mbit/s; ATM switching; CMOS crosspoint LSI; CMOS process; asynchronous-transfer-mode; bit-map oriented; broadband ISDN data rate; broadcasting; emitter-coupled-logic; input-buffer-type ATM switch; parasitic capacitance; pipelined connection control; throughput; Asynchronous transfer mode; B-ISDN; Broadcasting; Communication switching; Energy consumption; ISDN; Large scale integration; Switches; Switching systems; Throughput;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.62171

Filename

62171