MIDAS: Model for IP-inclusive DFM assessment of system manufacturability

Author

Subramaniyan, Kasyab P. ; Larsson-Edefors, Per

Author_Institution

Dept. of Comput. Sci. & Eng, Chalmers Univ. of Technol., Gothenburg, Sweden

fYear

2014

fDate

Sept. 29 2014-Oct. 1 2014

Firstpage

1

Lastpage

6

Abstract

Complex system implementations combined with the latest technology nodes allow us to implement hardware for versatile applications. The ever increasing demand for quick time-to-market has led to the widespread use of Intellectual Property (IP) in ASIC design methodologies. These developments, in addition to manufacturing limitations, make early prediction of manufacturability for complete systems challenging. We present MIDAS: a scalable, IP-inclusive model to predict system manufacturability. Results from applying MIDAS to an embedded processor system reveals that several useful insights can be gained towards realizing yield budgets for complex systems allowing quicker co-optimization of all implementation goals.

Keywords

application specific integrated circuits; design for manufacture; embedded systems; integrated circuit design; integrated circuit modelling; ASIC design; DFM; MIDAS; design for manufacture; embedded processor system; intellectual property; Computational modeling; IP networks; Libraries; Routing; Sensitivity; Wavelength division multiplexing; ASIC; DFM Metrics; IP; Manufacturability;

fLanguage

English

Publisher

ieee

Conference_Titel

CMOS Variability (VARI), 2014 5th European Workshop on

Conference_Location

Palma de Mallorca

Type

conf

DOI

10.1109/VARI.2014.6957079

Filename

6957079