A monolithic 2-b delta-sigma A/D converter

Author

Del Signore, B.P. ; Kerth, Donald A. ; Sooch, Navdeep S. ; Swanson, Eric J.

Author_Institution

Crystal Semicond. Corp., Austin, TX, USA

Volume

25

Issue

6

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1311

Lastpage

1317

Abstract

A monolithic 20-b analog-to-digital (A/D) converter using oversampling techniques which is implemented in standard 3-μm CMOS technology is described. The integrated circuit contains a fourth-order delta-sigma modulator and a digital finite-impulse-response filter and decimator. The modulator consists of a continuous-time chopper-stabilized front end, and a switched-capacitor loop filter and comparator. The dynamic range is 123 dB over a DC-to-500-Hz bandwidth, and the signal-to-noise-harmonic-distortion ratio is 126 dB. The chip consumes 125 mW power and has an area of 29.25 mm²

Keywords

CMOS integrated circuits; analogue-digital conversion; delta modulation; digital filters; switched capacitor filters; 0 to 500 Hz; 125 mW; 3 micron; CMOS technology; continuous-time chopper-stabilized front end; decimator; delta-sigma A/D converter; digital finite-impulse-response filter; dynamic range; oversampling techniques; signal-to-noise-harmonic-distortion ratio; switched-capacitor loop filter; Capacitors; Choppers; Circuit noise; Digital filters; Dynamic range; Feedback circuits; Filtering; Finite impulse response filter; Frequency; Sampling methods;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.62174

Filename

62174