DocumentCode
1541299
Title
Efficient Wakeup Scheduling Considering Both Resource Usage and Timing Budget for Power Gating Designs
Author
Lee, Ming-Chao ; Shi, Yiyu ; Chang, Shih-Chieh
Author_Institution
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Volume
31
Issue
7
fYear
2012
fDate
7/1/2012 12:00:00 AM
Firstpage
1041
Lastpage
1049
Abstract
Power gating has been a very effective way to reduce power leakage. Normally, wakeup scheduling is required to control the turn-on times of sleep transistors to limit the surge current during the wakeup process. In this paper, a voltage sensor is adopted to compare the virtual ground voltage with the predesigned reference voltages, and use the result to determine the turn-on times of sleep transistors. We then propose a novel wakeup scheduling formulation that considers the tradeoff between wakeup times and hardware resources incurred by the voltage sensor. To address this problem, on the one hand, an efficient algorithm is proposed to find a wakeup scheduling with minimum wakeup time under the resource constraint. On the other hand, the algorithm to find a wakeup scheduling with minimum resource usage under the timing budget is presented. Experimental results show that with little increase in wakeup times, our algorithm can achieve significant hardware resource reduction for power gating designs.
Keywords
integrated circuit design; leakage currents; scheduling; hardware resource reduction; minimum wakeup time; power gating designs; power leakage reduction; predesigned reference voltage; resource constraint; sleep transistors; surge current; timing budget; virtual ground voltage; voltage sensor; wakeup scheduling; Job shop scheduling; Optimal scheduling; Schedules; Surges; Switching circuits; Transistors; Power gating; wakeup scheduling;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2012.2187205
Filename
6218224
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