Author :
Kahng, Andrew B.
Author_Institution :
University of California, San Diego
Abstract :
A key facet of "More than Moore" scaling comes under the heading of "3D"—the stacking of multiple integrated-circuit dies using through-silicon vias (TSVs). Stacked-die products reached the marketplace decades ago, but with peripheral I/O on individual dies and interchip interconnect on the "side" of the stack. TSVs are a game changer, as this column explains.
Keywords :
TSVs; design and test; interconnects; scaling; through-silicon vias;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2010.92