An image signal multiprocessor on a single chip

Author

Maruyama, Masakatsu ; Nakahira, Hiroyuki ; Araki, Toshiyuki ; Sakiyama, Shirou ; Kitao, Yoshitaka ; Aono, Kunitoshi ; Yamada, Haruyasu

Author_Institution

Matsushita Electr. Ind. Co., Osaka, Japan

Volume

25

Issue

6

fYear

1990

fDate

12/1/1990 12:00:00 AM

Firstpage

1476

Lastpage

1483

Abstract

A digital image signal multiprocessor (ISMP), a multiprocessor version of a previous real-time image signal processor (RISP) for gray-level image processing, is discussed. It is composed of a main controller and four processor elements (PEs), which are programmable 12-b digital signal processors. One PE has the processing speed of 50-million microinstructions-per-second. The ISMP has 200-million microinstructions-per-second performance using parallel processing with a round-robin method for local image processing. In the other operation mode, each PE processes the same image data with different feature-extracting programs. In addition, system processing power can be easily increased through a novel multichip processing mode. It has 30000 transistors on a 14.4-mm×13.7-mm chip using 1.2-μm double-metal CMOS process technology. Its power dissipation is 2.9 W

Keywords

CMOS integrated circuits; VLSI; computerised picture processing; digital signal processing chips; parallel architectures; real-time systems; 1.2 micron; 2.9 W; DSP; digital image signal multiprocessor; digital signal processors; double-metal CMOS process; feature-extracting programs; gray-level image processing; multichip processing mode; parallel processing; round-robin method; CMOS process; CMOS technology; Digital filters; Digital images; Image processing; Image sampling; Pixel; Power dissipation; Signal processing; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.62183

Filename

62183