• DocumentCode
    1541998
  • Title

    Wormhole IP over (connectionless) ATM

  • Author

    Katevenis, M.G.H. ; Mavroidis, Iakovos ; Sapountzis, G. ; Kalyvianaki, Evangelia ; Mavroidis, Iakovos ; Glykopoulos, G.

  • Author_Institution
    Inst. of Comput. Sci., Found. for Res. & Technol.-Hellas, Crete, Greece
  • Volume
    9
  • Issue
    5
  • fYear
    2001
  • fDate
    10/1/2001 12:00:00 AM
  • Firstpage
    650
  • Lastpage
    661
  • Abstract
    High-speed switches and routers internally operate using fixed-size cells or segments; variable-size packets are segmented and later reassembled. Connectionless ATM was proposed to quickly carry IP packets segmented into cells (AAL5) using a number of hardware-managed ATM VCs. We show that this is analogous to wormhole routing. We modify this architecture to make it applicable to existing ATM equipment: we propose a low-cost, single-input, single-output wormhole IP router that functions as a VP/VC translation filter between ATM subnetworks. When compared to IP routers, the proposed architecture features simpler hardware and lower latency. When compared to software-based IP-over-ATM techniques, the new architecture avoids the overheads of a large number of labels, or the delays of establishing new flows in software after the first few packets have suffered considerable latencies. We simulated a wormhole IP routing filter, showing that a few tens of hardware-managed VCs per outgoing VP usually suffice. We built and successfully tested a prototype, operating at 2×155 Mb/s, using one field programmable gate array (FPGA) and DRAM. Simple analysis shows that operation at 10 Gb/s and beyond is feasible today
  • Keywords
    DRAM chips; asynchronous transfer mode; field programmable gate arrays; multiprocessor interconnection networks; packet switching; telecommunication equipment testing; telecommunication network routing; transport protocols; 10 Gbit/s; 155 Mbit/s; AAL5; ATM equipment; ATM subnetworks; DRAM; FPGA; IP packets; VP/VC translation filter; connectionless ATM; field programmable gate array; fixed-size cells; fixed-size segments; hardware-managed ATM VC; high-speed routers; high-speed switches; low-cost wormhole IP router; single-input single-output router; software-based IP-over-ATM; variable-size packets; wormhole IP over ATM; wormhole IP routing filter; wormhole routing; Asynchronous transfer mode; Computer architecture; Delay; Field programmable gate arrays; Filters; Hardware; Packet switching; Routing; Switches; Virtual colonoscopy;
  • fLanguage
    English
  • Journal_Title
    Networking, IEEE/ACM Transactions on
  • Publisher
    ieee
  • ISSN
    1063-6692
  • Type

    jour

  • DOI
    10.1109/90.958332
  • Filename
    958332