DocumentCode
1542018
Title
Hybrid annihilation transformation (HAT) for pipelining QRD-based least-square adaptive filters
Author
Chi, Zhipei ; Ma, Jun ; Parhi, Keshab K.
Author_Institution
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume
48
Issue
7
fYear
2001
fDate
7/1/2001 12:00:00 AM
Firstpage
661
Lastpage
674
Abstract
A novel transformation, referred to as hybrid annihilation transformation (HAT), for pipelining the QR decomposition (QRD) based least square adaptive filters has been developed. HAT provides a unified framework for the derivation of high-throughput/low-power VLSI architectures of three kinds of QRD adaptive filters, namely, QRD recursive least-square (LS) adaptive filters, QRD LS lattice adaptive filters, and QRD multichannel LS lattice adaptive filters. In this paper, HAT is presented as a solution to break the bottleneck of a high-throughput implementation introduced by the inherent recursive computation in the QRD based adaptive filters. The most important feature of the proposed solution is that it does not introduce any approximation in the entire filtering process. Therefore, it causes no performance degradation no matter how deep the filter is pipelined. It allows a linear speedup in the throughput rate by a linear increase in hardware complexity. The sampling rate can be traded off for power reduction with lower supply voltage for applications where high-speed is not required. The proposed transformation is addressed both analytically, with mathematical proofs, and experimentally, with computer simulation results on its applications in wireless code division multiple access (CDMA) communications, conventional digital communications and multichannel linear predictions
Keywords
VLSI; adaptive filters; digital filters; least squares approximations; pipeline processing; QR decomposition; QRD-based least-square adaptive filters; digital communications; filtering process; hardware complexity; high-throughput implementation; hybrid annihilation transformation; lattice adaptive filters; linear speedup; low-power VLSI architectures; mathematical proofs; multichannel LS lattice adaptive filters; multichannel linear predictions; pipelining; recursive computation; recursive least-square adaptive filters; sampling rate; throughput rate; wireless code division multiple access; Adaptive filters; Application software; Computer architecture; Filtering; Lattices; Least squares approximation; Least squares methods; Multiaccess communication; Pipeline processing; Very large scale integration;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.958336
Filename
958336
Link To Document