Design of low-voltage front-end interface for switched-op amp circuits

Author

Karthikeyan, Soundarapandian ; Tamminneedi, Anilkumar ; Boecker, Charles ; Lee, Edward K F

Author_Institution

Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA

Volume

48

Issue

7

fYear

2001

fDate

7/1/2001 12:00:00 AM

Firstpage

722

Lastpage

726

Abstract

Switched-op amp technique is an effective technique for designing low-voltage switched-capacitor circuits. The only drawback with this approach is the difficulty in designing the front-end interface to the external input, In this paper, front-end interface structures with wide signal swing and no voltage boosting are proposed. Based on a conventional 1.2-μm CMOS process, a front-end interface was designed and implemented. For a 1-V supply, the interface dissipates 80 μW. The track mode THD was measured to be -78 dB for a 600-mV peak-to-peak output suing, and the maximum sampling rate was measured to be 600 kS/s for a capacitive load of 20 pF

Keywords

CMOS analogue integrated circuits; harmonic distortion; low-power electronics; switched capacitor networks; 1 V; 1.2 micron; 20 pF; 80 muW; CMOS process; capacitive load; low-voltage front-end interface; peak-to-peak output suing; sampling rate; switched-capacitor circuits; switched-op amp circuits; track mode THD; wide signal swing; Analog circuits; Boosting; CMOS process; Low voltage; MOSFET circuits; Resistors; Sampling methods; Switched capacitor circuits; Switches; Switching circuits;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.958342

Filename

958342