High-temperature superconducting edge-type Josephson junctions with modified interfaces

Author

Satoh, T. ; Hidaka, M. ; Tahara, S.

Author_Institution

Fundamental Res. Labs., NEC Corp., Ibaraki, Japan

Volume

9

Issue

2

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

3141

Lastpage

3144

Abstract

A new process is presented for fabricating uniform high-temperature superconducting edge-type Josephson junctions. The junctions were fabricated by an in situ process using low-/spl epsi/ LaSrAlTaO material for both the insulator layer and the substrate. The LaSrAlTaO layer played a role as a mask for in situ edge fabrication. This process contained no intentional barrier deposition process. These junctions however showed resistively and capacitively shunted junction like current-voltage characteristics and an excellent uniformity. These junctions showed small spreads in the critical current as low as 1 /spl sigma/=8% for 100 junctions at 4.2 K.

Keywords

Josephson effect; high-temperature superconductors; LaSrAlTaO; LaSrAlTaO insulator layer; LaSrAlTaO substrate; capacitively shunted junction; critical current; current-voltage characteristics; edge-type Josephson junction; high temperature superconductor; in situ fabrication; interface engineering; mask; resistively shunted junction; uniformity; Critical current; Fabrication; High temperature superconductors; Insulation; Integrated circuit technology; Josephson junctions; Superconducting epitaxial layers; Superconducting integrated circuits; Superconducting materials; Textile industry;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.783695

Filename

783695