DocumentCode :
1542339
Title :
Improved Launch for Higher TDF Coverage With Fewer Test Patterns
Author :
Shi, Youhua ; Togawa, Nozomu ; Yanagisawa, Masao ; Ohtsuki, Tatsuo
Author_Institution :
Sch. of Sci. & Eng., Waseda Univ., Tokyo, Japan
Volume :
29
Issue :
8
fYear :
2010
Firstpage :
1294
Lastpage :
1299
Abstract :
Due to the limitations of scan structure, the second vector in transition delay test is usually applied either by shift operation or by functional launch, which possibly results in unsatisfying transition delay fault (TDF) coverage. To overcome such a limitation for higher TDF coverage, a novel improved launch delay test technique that combines the pros of launch-on-shift and launch-on-capture tests is introduced in this paper. The proposed method can achieve near perfect TDF coverage with fewer test patterns without the need for a global fast scan enable signal. Experimental results on ISCAS89 and ITC99 benchmark circuits are included to show the effectiveness of the proposed method.
Keywords :
automatic test pattern generation; circuit testing; TDF coverage; launch delay test technique; launch-on-capture test; launch-on-shift; transition delay fault; transition delay test; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Clocks; Costs; Delay; Flip-flops; Lab-on-a-chip; Performance evaluation; Design for testability; transition delay testing; transitional delay test coverage;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2010.2047475
Filename :
5512687
Link To Document :
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