A Josephson 10-b instruction 128-word ROM unit

Author

Aoyagi, Masahiro ; Nakagawa, Hiroshi ; Kurosawa, Itaru ; Kosaka, Shin ; Okada, Yoshikuni ; Hamazaki, Youichi ; Takada, Susumu

Author_Institution

Electrotech. Lab., Tsukuba, Japan

Volume

25

Issue

4

fYear

1990

fDate

8/1/1990 12:00:00 AM

Firstpage

971

Lastpage

978

Abstract

A Josephson instruction read-only memory unit (IROU) has been demonstrated. The IROU, which is composed of a 10-b×128-word ROM plane, a 6-64 decoder, two multiplexers, and several buffers, stores a program for the Josephson computer ETL-JC1. The ROM plane was designed using two-junction DC-SQUID-type ROM cells, in which the zero ROM cell has no junction and no superconducting loop and one ROM cell has a damping resistor. The peripheral circuits were designed using a 4JL family of OR, AND, INVERT, and AMP gates. The IROU chip was fabricated using a Nb-AlO_x-Nb Josephson tunnel junction IC technology with a 3-μm design rule. There were 1280 ROM cells and 789 4JL gates integrated on the 5-mm×3.45-mm chip. All 128 words of the ROM plane could be read with a total power dissipation of 1.63 mW. The minimum total access time was measured to be 390 ps

Keywords

Josephson effect; read-only storage; superconducting junction devices; superconducting memory circuits; 1.63 mW; 1280 bit; 3 micron; 390 ps; 4JL family; DC-SQUID-type ROM cells; ETL-JC1; Josephson computer; Josephson tunnel junction IC; Nb-AlO_x-Nb; ROM unit; buffers; damping resistor; decoder; instruction read-only memory; minimum total access time; multiplexers; peripheral circuits; superconducting loop; total power dissipation; Buffer storage; Damping; Decoding; Integrated circuit technology; Josephson junctions; Multiplexing; Power dissipation; Read only memory; Resistors; Superconducting integrated circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.58289

Filename

58289