DocumentCode
1542776
Title
Input waveform slope effects in CMOS delays
Author
Auvergne, Daniel ; Azemard, N. ; Deschacht, D. ; Robert, M.
Author_Institution
Lab. d´´Autom. et de Microelectron., Montpellier II Univ., France
Volume
25
Issue
6
fYear
1990
fDate
12/1/1990 12:00:00 AM
Firstpage
1588
Lastpage
1590
Abstract
Slow input ramp effects in delay evaluation on CMOS structures are considered. Corrections of previously defined closed-form equations are proposed, allowing accurate evaluation of delays in a large range of configurations. The expressions obtained remain sufficiently manageable to be used in an automatic data-path sizing tool
Keywords
CMOS integrated circuits; delays; CMOS delays; automatic data-path sizing tool; delay evaluation; input waveform slope effects; monolithic IC; slow input ramp effects; Circuit noise; Circuit simulation; Delay effects; Equations; Noise level; Noise reduction; Propagation delay; SPICE; Signal to noise ratio; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.62196
Filename
62196
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