Title :
Comments on `In-place updating of path metrics in Viterbi decoders´
Author_Institution :
US Naval Underwater Syst. Center, Newport, RI
fDate :
8/1/1990 12:00:00 AM
Abstract :
For the original article see ibid., vol.24, no.4, p.1158-9 (1989). The authors of the above-titled paper proposed a computation scheme for updating path metrics in solid-state Viterbi decoders. They formally showed that the permutation of items in memory is a cyclic address rotation, and they described a hardware implementation based on the use of a barrel shifter. The commenter points out that the use of cyclic address rotation for Viterbi decoders has already been noted in the literature and shows that even greater VLSI area reduction is possible through the use of a tree shifter
Keywords :
VLSI; decoding; digital integrated circuits; field effect integrated circuits; pipeline processing; FFT processing; NMOS technology; VLSI area reduction; barrel shifter; computation scheme; cyclic address rotation; hardware implementation; memory; path metrics updating; radix-8 pipeline; solid-state Viterbi decoders; tree shifter; Bandwidth; Circuit noise; Decoding; Hardware; MOS devices; Pipelines; Switches; Temperature; Viterbi algorithm; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of