DocumentCode :
1542943
Title :
High-speed decimation filter for delta-sigma analog-to-digital converter
Author :
Xie, Y.P. ; Whiteley, S.R. ; Van Duzer, T.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
9
Issue :
2
fYear :
1999
fDate :
6/1/1999 12:00:00 AM
Firstpage :
3632
Lastpage :
3635
Abstract :
A 12-bit digital filter is designed for an A/D converter system with sampling speed of 16 GHz. Data stream of 16 Gbit/s from delta-sigma modulator will pass through a 1:4 demultiplexer. Four identical 12-bit digital filters are used to catch the data streams from the demultiplexer for 4 Gbit/s in each channel. The 12-bit superconductive digital filter is designed with modified variable threshold logic (MVTL) gates. A novel XOR gate is designed and used in this circuit to reduce circuit complexity and improve performance. Progress of high speed testing results is presented. The filter comprises 584 Josephson junctions and consumes about 1 mW power.
Keywords :
crosstalk; delta-sigma modulation; demultiplexing equipment; digital filters; high-speed integrated circuits; logic gates; superconducting filters; superconducting integrated circuits; 1 mW; 12 bit; 16 GHz; 16 Gbit/s; Josephson junctions; circuit complexity; data streams; delta-sigma analog-to-digital converter; demultiplexer; high speed testing; high-speed decimation filter; modified variable threshold logic gates; sampling speed; superconductive digital filter; Circuit testing; Complexity theory; Delta modulation; Digital filters; Josephson junctions; Logic design; Logic gates; Sampling methods; Superconducting filters; Superconductivity;
fLanguage :
English
Journal_Title :
Applied Superconductivity, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8223
Type :
jour
DOI :
10.1109/77.783815
Filename :
783815
Link To Document :
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