Accurate prediction of the temperature of DMOS transistors used in automotive and industrial power integrated circuits has become critical as these devices are operated at ever increasing power densities. Correct temperature modeling of these devices up to thermal runaway has to be backed by experimental DMOS characterization at high temperatures. In this paper, we present a test setup used for device characterization up to 500
. The temperature control is achieved via on-chip integrated heating elements and can be deployed for both on-wafer and packaged device testing, without the need of a protective atmosphere and external heating elements.