Title :
High-speed asynchronous data multiplexing/demultiplexing
Author :
Kirichenko, A.F.
Author_Institution :
HYPRES, Elmsford, NY, USA
fDate :
6/1/1999 12:00:00 AM
Abstract :
High-speed data acquisition and communication systems require fast multiplexing and demultiplexing of data. We are developing novel multiplexer/demultiplexer circuits using a dual-rail approach. A single cell of the demultiplexer is a toggle type B flip-flop. The demultiplexer operates at 95 GHz and its performance does not depend on the demultiplexing ratio. The dual-rail technique avoids racing between data and clock signals. The multiplexer circuit is based on RS type B flip-flops and works up to 60 GHz. The circuits are implemented in HYPRES´ standard Nb process with a critical current density of 1.0 KA/cm/sup 2/.
Keywords :
asynchronous circuits; demultiplexing equipment; flip-flops; high-speed integrated circuits; multiplexing equipment; superconducting integrated circuits; 60 GHz; 95 GHz; Nb; Nb process; RS type B flip-flop; critical current density; data demultiplexing; data multiplexing; high-speed asynchronous dual-rail circuit; superconducting RSFQ circuit; toggle type B flip-flop; Clocks; Data acquisition; Delay; Demultiplexing; Flip-flops; Inductance; Logic circuits; Multiplexing; Niobium; Timing;
Journal_Title :
Applied Superconductivity, IEEE Transactions on
