DocumentCode :
1544557
Title :
An improved FET model for computer simulators
Author :
Parker, Anthony E. ; Skellern, David J.
Author_Institution :
Dept. of Electr. Eng., Sydney Univ., NSW, Australia
Volume :
9
Issue :
5
fYear :
1990
fDate :
5/1/1990 12:00:00 AM
Firstpage :
551
Lastpage :
553
Abstract :
Described is an alternative simple description of FET drain current that provides the flexibility of an extra parameter which can be chosen to approximate the Shockley expression or general power law. An empirical polynomial expression which uses only integer powers is used to provide computational efficiency. The expression gives the designer a more accurate FET model which is consistent for both large- and small-signal simulations
Keywords :
circuit analysis computing; field effect transistors; semiconductor device models; FET model; Shockley expression; computer simulators; drain current; general power law; large signal simulation; polynomial expression; small-signal simulations; Australia; Circuit simulation; Computational efficiency; Computational modeling; Computer simulation; Doping profiles; FETs; Polynomials; SPICE; Semiconductor process modeling;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.55175
Filename :
55175
Link To Document :
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