A 10 b 50 MS/s Opamp-Sharing Pipeline A/D With Current-Reuse OTAs

Author

Chandrashekar, Kailash ; Bakkaloglu, Bertan

Author_Institution

Electr. Eng. Dept., Arizona State Univ., Tempe, AZ, USA

Volume

19

Issue

9

fYear

2011

Firstpage

1610

Lastpage

1616

Abstract

A 10 b opamp-sharing pipeline analog-to-digital (A/D) using current-reuse operational transconductance amplifiers (OTA) with dual nMOS differential inputs is presented. The current-reuse OTA topology facilitates opamp-sharing between all of the consecutive pipeline stages, minimizing power consumption and die area. Analog transistors in the OTA are always biased in saturation ensuring no loss of settling time due to OTA power turn-on delays. The A/D is fabricated in a 0.18-μ m CMOS process and occupies an active die area of 0.7 mm². At 50 MS/s, maximum SNDR of 58 dB (ENOB=9.3 b) is achieved with 9.2 mW analog power consumption on a 1.8 V supply.

Keywords

CMOS integrated circuits; analogue-digital conversion; delays; network topology; operational amplifiers; CMOS process; analog transistor; current-reuse OTA; current-reuse operational transconductance amplifier; die area; dual nMOS differential input; noise figure 58 dB; opamp-sharing pipeline A-D converter; opamp-sharing pipeline analog-to-digital converter; power 9.2 mW; power consumption; power turn-on delay; size 0.18 mum; voltage 1.8 V; CMOS process; Delay effects; Energy consumption; MOS devices; Operational amplifiers; Pipelines; Sampling methods; Switches; Topology; Transconductance; Current-reuse operational transconductance amplifier (OTA); opamp-sharing; pipeline analog-to-digital (A/D);

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2010.2052376

Filename

5518347